Concepts

The core concepts behind GRiD’s generated code: the design principles, the codegen architecture, the shared-memory resource-tier system, the input/output ABI, and the parallelism patterns.

• Algorithm Design Principles & Best Practices
  • The one-paragraph version
  • 1. Smart inners, thin wrappers
  • 2. The inner owns its memory placement (the central rule)
  • 3. Memory-hierarchy design
  • 4. The spill ladder and per-tier picks
  • 5. Recipe: adding or modifying an algorithm
  • 6. Validation discipline
  • 7. Anti-patterns to avoid (each one bit us once)
  • Go deeper
• Input / Output ABI (h_q_qd_u)
  • The per-timestep input block
  • Floating base
  • Which surface protects you
  • Stability
• Library-safe initialization and cleanup
  • The contract
  • Streams, arena and teardown (part 2)
  • Owning handle
  • Legacy spellings
  • Testing the failure paths
• Runtime contexts
  • The default context
  • Explicit contexts
  • Identity rules
  • Device profile
  • Mutation, model versions and autograd
  • Captured graphs (torch capture / GraphCallable)
  • What is deferred
• Operand validation
  • The rule set
  • Where each surface enforces the rules
• Parallelism Patterns (the in-block fan-out toolkit)
  • P1 — Depth / BFS-level batching of tree recursions
  • P2 — Parallel independent columns (gradients / Jacobians / Hessians)
  • P3 — Loop-invariant hoist → store temps → batch-parallel after
  • P4 — Offline memory layout: sparse compaction, coalesced distribution, topology-helper indirection
  • The audit (a standing requirement)
• Algorithms
  • inverse_dynamics (RNEA / Recursive Newton-Euler Algorithm)
  • ABA (Articulated Body Algorithm)
  • CRBA (Composite Rigid Body Algorithm)
  • Minv (Direct Mass-Matrix Inverse)
  • Frame Jacobian (general-frame geometric Jacobian)
  • IDSVA / IDSVA-SO (Inverse Dynamics, Second-Order)
  • FDSVA-SO (Forward Dynamics, Second-Order)
  • Kinematics (end-effector pose, Jacobian, Hessian)
  • Bias terms, centroidal quantities and energy
  • Integrators and the plant layer
  • Algorithm Overview
• Codegen Architecture
  • The three emission layers
  • Scratch ownership
  • Nested composition
  • Schematic layers (RNEA / inverse_dynamics)
  • Thread-count assumptions
  • Per-algo metadata: the descriptor table
  • The binding surface: generated from abi_specs.py
  • See also
• The MuJoCo (mjx) output convention
  • The two raw differences
  • Value and derivative transforms
  • How GRiD serves it: native kernel twins
  • Three ways to ask for it
  • What it costs (and how to opt out)
  • The known-parity contract
  • Convention map (per function, empirically confirmed)
• cuBLASDx Removal & Any-Thread-Count Library Functions
  • Why we are removing cuBLASDx
  • What’s changing
  • Testing strategy
  • Revert path
  • Cache invalidation
  • Open research questions (deferred backlog)
  • Execution phases
  • Adjacent considerations
  • See also
• Resource-Tier System (v2.0)
  • What the tier system is
  • Who this is for (read this first)
  • Smart memory: shared vs. global, spills, and L2 pinning
  • Block-wide parallelism in the inners
  • Exposed sizing + placement constants (power-user reference)
  • What’s plumbed today
  • References
• Resource-Tier Design Notes
  • Design philosophy: smart inners, thin wrappers
  • Design choices
  • How it relates to other v2.0 work
• Resource-Tier Changelog
  • MT output tiering — W2b Component B (2026-09-16)
  • Integrator surgical spill (value + gradient)
  • idsva_so (body + world frame) — done
  • Humanoid-scale spill (humanoid-tier-spill, landed)
  • LITE 48 KB smem target — shipped; value tuning remains
  • Deferred validation sweep (P7 / P8)